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Field-programmable gate array
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651	Benchmarking Method and Designs Targeting Logic Synthesis for FPGAs Joachim Pistorius, Mike Hutton Altera Corp. 101 Innovation Drive San Jose, CA 95134 {jpistori,mhutton}@altera.com Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2007-04-20 22:36:42 Logic synthesis Physical design Register-transfer level Altera Quartus Place and route Application-specific integrated circuit Integrated circuit design Digital electronics Semiconductor intellectual property core Electronic engineering Electronic design automation Field-programmable gate array
652	Generating Efficient Libraries for use in FPGA Resynthesis Algorithms Andrew Kennings Alan Mishchenko Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2010-03-10 22:06:40 Digital electronics Boolean algebra Arrays Computer performance Lookup table Field-programmable gate array Truth table Programmable logic device Function Mathematics Electronic engineering Computing
653	Microsoft Word - power18.doc Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2009-07-10 18:57:40 Electronic design Integrated circuits And-inverter graph Field-programmable gate array Logic synthesis Logic gate Sequential logic Power optimization CMOS Electronic engineering Electronic design automation Digital electronics
654	Integrating Logic Synthesis, Technology Mapping, and Retiming Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-01 16:05:11 Digital electronics Electronic design Formal methods And-inverter graph Retiming Logic synthesis Automatic test pattern generation Field-programmable gate array Sequential logic Electronic engineering Electronics Electronic design automation
655	Cutless FPGA Mapping Alan Mishchenko Sungmin Cho Satrajit Chatterjee Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-09-14 17:01:40 And-inverter graph Tree Trie Directed acyclic graph R-tree Graph theory Diagrams Field-programmable gate array
656	COMPANY OVERVIEW Digital Core Design is a leading IP Core provider and a System-on-Chip design house. The company was founded in 1999 and since the very beginning has been focused on IP Core architecture improvements. Ou Add to Reading List Source URL: dcd.pl Language: English - Date: 2014-10-23 09:18:10 Data transmission Universal asynchronous receiver/transmitter Embedded systems 16550 UART Microcontrollers COM Field-programmable gate array Intel MCS-51 WDC 65C134 Electronic engineering Electronics Computer hardware
657	COMPANY OVERVIEW Digital Core Design is a leading IP Core provider and a System-on-Chip design house. The company was founded in 1999 and since the very beginning has been focused on IP Core architecture improvements. Ou Add to Reading List Source URL: dcd.pl Language: English - Date: 2014-10-23 08:59:45 Data transmission Universal asynchronous receiver/transmitter Embedded systems 16550 UART Microcontrollers COM Field-programmable gate array VHDL Intel MCS-51 Electronic engineering Electronics Computer hardware
658	Board-Level Multiterminal Net Assignment Xiaoyu Song1, William N. N. Hung2, Alan Mishchenko1, Malgorzata Chrzanowska-Jeske1, Alan Coppola3 and Andrew Kennings4 1 Department of ECE, Portland State University, Portland, O Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2002-03-01 13:11:46 Applied mathematics Logic in computer science NP-complete problems Formal methods Boolean algebra Boolean satisfiability problem Field-programmable gate array Conjunctive normal form Routing Theoretical computer science Electronic engineering Electronic design automation
659	Improvements to Technology Mapping for LUT-Based FPGAs Alan Mishchenko Satrajit Chatterjee Robert Brayton Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-02-27 22:53:37 Diagrams And-inverter graph Logic synthesis Field-programmable gate array Directed acyclic graph Algorithm Heuristic function Electronic engineering Electronic design automation Electrical engineering
660	DAG-Aware AIG Rewriting A Fresh Look at Combinational Logic Synthesis Alan Mishchenko Satrajit Chatterjee Add to Reading List Source URL: www.bvsrc.org Language: English - Date: 2006-05-08 11:02:22 Digital electronics Electronic design Logic in computer science And-inverter graph Logic synthesis Field-programmable gate array American International Group Directed acyclic graph Logic gate Electronic engineering Electronic design automation Formal methods

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